Groq plans stacked DRAM for its next inference chip to fix a memory problem

The Nvidia-backed chip designer reportedly wants 3D-stacked DRAM to give its LPUs room for trillion-parameter models Groq built its reputation on speed. Its next chip may finally get the storage space to match. Industry sources revealed on October 20, 2026, that Groq plans to integrate 3D-stacked DRAM into its upcoming Language Processing Unit inference chips. The goal is to raise memory capacity and bandwidth for large AI models, without giving up the raw throughput that made the company’s hardware stand out. The plan centers on 3D-stacked DRAM, often shortened to 3DS, connected with through-silicon vias, or TSVs. According to the research findings, Groq’s version is meant to expand vertical DRAM capacity using standard interfaces. The emphasis is on scalability rather than chasing the most extreme bandwidth numbers possible.

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